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发帖数: 42 | 1 If you are interested, contact with me via mitbbs email.
The position is in San Jose, CA.
Senior modeling/verification Engineer
Responsibilities:
Design, implement and maintain video Codec functional c-model
Model architecture for the hardware implementation of video Codec
Develop tests and test plan to verify the correctness of the design
Collaborate with firmware and hardware team to perform RTL integration
Conduct performance analysis and architecture tradeoff study.
Requirements:
BS/MS/PHD in EE, CS or CE with 5+ years of experiences with verification
or modeling
Experience in image/video processing and video codec standards such as
MPEG-2, H.264 or VP8
Strong C/C++, Verilog and scripting language
Highly motivated and be able to work both independently and as a team
member
Experience in SystemC, SystemVerilog a plus |
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