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EE版 - 贴一个EDA job opening
相关主题
有没有喜欢编程的模拟电路设计师?请教高手:怎么将encounter导入virtuoso?
So, how many of you guys have used Cadence IC 6.1.from schematic to layout
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相关话题的讨论汇总
话题: position话题: analog话题: circuit
进入EE版参与讨论
1 (共1页)
b****b
发帖数: 4
1
如果感兴趣,回我站内信箱
Sr Member of Technical Staff
Job ID #: 5408 Location: Pittsburgh, PA
Functional Area: Engineering Cost Center: ADE - US
Position Type: Regular Education Required: Masters Degree
Experience Required: None Relocation Provided: Yes

Position Description
Manufacturing variation is becoming an increasingly important factor to
cause yield loss and respin in modern custom digital and analog circuit
design flow. Virtuoso ADE GXL is a software tool that offers analog circuit
designers statistical analysis, design optimization and yield optimization
capabilities to address this growing problem. We are seeking a talented
software developer with a strong background in statistical analysis,
nonlinear optimization and modeling.
Position Requirements
- Strong background in statistical analysis, nonlinear optimization and
modeling
- Demonstrated proficiency in C++ and general software development skills
- Master in Computer Science or Electrical Engineering required, PhD
preferred.
- Excellent communication skill
- Experience with Cadence Virtuoso or analog circuit design is a plus.
We offer a very aggressive financial compensation program, equity
participation, and outstanding benefits and 401k programs. For more
information on this and other Cadence opportunities, please contact Don
Galloway of our Corporate Staffing Group at 770-663-4490 or email your
resume to d**[email protected] today.
All inquiries and responses are held in strictest confidence.
Principals only, no agency or search referrals will be honored!
b****b
发帖数: 4
2
顶起来,
Sponsor H1B and GC.

【在 b****b 的大作中提到】
: 如果感兴趣,回我站内信箱
: Sr Member of Technical Staff
: Job ID #: 5408 Location: Pittsburgh, PA
: Functional Area: Engineering Cost Center: ADE - US
: Position Type: Regular Education Required: Masters Degree
: Experience Required: None Relocation Provided: Yes
:
: Position Description
: Manufacturing variation is becoming an increasingly important factor to
: cause yield loss and respin in modern custom digital and analog circuit

1 (共1页)
进入EE版参与讨论
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请问:想做VLSI要学什么软件和语言啊请教一个cadence问题
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KLA-Tencor 工作机会cadence的快捷键
有没有喜欢编程的模拟电路设计师?请教高手:怎么将encounter导入virtuoso?
So, how many of you guys have used Cadence IC 6.1.from schematic to layout
AMS simulator in Cadence Virtuoso ADE请教circuit simulation的两个问题
请教几个VLSI的就业方向Switch Model in Cadence Virtuoso Schematic Editing
相关话题的讨论汇总
话题: position话题: analog话题: circuit