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JobHunting版 - Internal reference available for PHY verification engineer in San Diego
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r******9
发帖数: 129
1
Requirements:
* MS/PHD degree in EE
* Verilog / System Verilog (OVM/UVM) / any scripting language
* 4+ years industry experience
* Mixed signal verification experience is a big plus
站内联系
Thanks
1 (共1页)
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也说说我的jobhuntingSenior ASIC Design Verification engineer openning
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话题: san话题: diego话题: internal话题: phy