JobHunting版 - [Apple Jobs] Silicon Engineering - CAD,VLSI, IP, etc |
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A*******s
发帖数: 23 | 1 Email your resume and job title to a****************[email protected]
Full position list:
Timing (STA) Manager
Sr. Physical Design Engineer - PnR
Physical Design Engineer - STA
Physical Design Engineer - Timing Spice
Physical Design Engineer - PDV
Physical Design Methodology Engineer
Signal Integrity Engineer
Serdes PCS Design Engineer
IC Clock Design Engineer
Analog IP Engineer
Analog IP Validation Engineer
Design Verification Engineer
Silicon Validation-Debug/Triage Engineer
Silicon Validation Engineer - Linux
Formal Verification Engineer
Graphics Validation Engineer
Silicon Validation Engineer - Embedded
ASIC Design Engineer
Silicon Engineering Manager
VLSI Design Manager
Analog Chip Development Engineer
Sr. Product Engineer
CPU Implementation Lead Engineer
CPU Implementation Engineer
Sr. Circuit Design Engineer
Embedded Software QA Engineer
Soc Test Engineer
CPU Technical Mgr/Lead- Debug
CPU Design Verification Engineer
Design Verification
Functional Verification Engineer
Design Verification Software
Micro-Architect - Orlando
Micro-Architect - Cupertino
3D Graphics Micro-Architect
Power Analysis/ Modeling Engineer
Logic Implementation
Logic Design Engineer
Functional Verification Engineer - Cupertino
Functional Verification Engineer - Orlando
3D Graphics Functional Verification
Sr. CAD Engineer - Synthesis - Austin
Sr. CAD Engineer - Synthesis - Cupertino
License and Compute Administrator - Austin
License and Compute Administrator - Cupertino
Queue Developer and Performance Engineer
CAD Engineer - Infrastructure & Queueing
CAD - Physical Design Engineer
Sr. P&R CAD Physical Design Engineer
Sr. CAD Engineer – Design Verification - Austin
Sr. CAD Engineer - Design Verification - Cupertino
Sr. EDA CAD Engineer - Timing
CAD - STA | A*******s
发帖数: 23 | 2 Email your resume and job title to a****************[email protected]
Full position list:
Timing (STA) Manager
Sr. Physical Design Engineer - PnR
Physical Design Engineer - STA
Physical Design Engineer - Timing Spice
Physical Design Engineer - PDV
Physical Design Methodology Engineer
Signal Integrity Engineer
Serdes PCS Design Engineer
IC Clock Design Engineer
Analog IP Engineer
Analog IP Validation Engineer
Design Verification Engineer
Silicon Validation-Debug/Triage Engineer
Silicon Validation Engineer - Linux
Formal Verification Engineer
Graphics Validation Engineer
Silicon Validation Engineer - Embedded
ASIC Design Engineer
Silicon Engineering Manager
VLSI Design Manager
Analog Chip Development Engineer
Sr. Product Engineer
CPU Implementation Lead Engineer
CPU Implementation Engineer
Sr. Circuit Design Engineer
Embedded Software QA Engineer
Soc Test Engineer
CPU Technical Mgr/Lead- Debug
CPU Design Verification Engineer
Design Verification
Functional Verification Engineer
Design Verification Software
Micro-Architect - Orlando
Micro-Architect - Cupertino
3D Graphics Micro-Architect
Power Analysis/ Modeling Engineer
Logic Implementation
Logic Design Engineer
Functional Verification Engineer - Cupertino
Functional Verification Engineer - Orlando
3D Graphics Functional Verification
Sr. CAD Engineer - Synthesis - Austin
Sr. CAD Engineer - Synthesis - Cupertino
License and Compute Administrator - Austin
License and Compute Administrator - Cupertino
Queue Developer and Performance Engineer
CAD Engineer - Infrastructure & Queueing
CAD - Physical Design Engineer
Sr. P&R CAD Physical Design Engineer
Sr. CAD Engineer – Design Verification - Austin
Sr. CAD Engineer - Design Verification - Cupertino
Sr. EDA CAD Engineer - Timing
CAD - STA | A*******s
发帖数: 23 | 3 Up
★ 发自iPhone App: ChineseWeb 7.8
【在 A*******s 的大作中提到】
: Email your resume and job title to a****************[email protected]
: Full position list:
: Timing (STA) Manager
: Sr. Physical Design Engineer - PnR
: Physical Design Engineer - STA
: Physical Design Engineer - Timing Spice
: Physical Design Engineer - PDV
: Physical Design Methodology Engineer
: Signal Integrity Engineer
: Serdes PCS Design Engineer
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