a******n 发帖数: 55 | 1 SoC Physical Design Engineer
This individual will contribute from RTL to GDS on block level designs.
Specific tasks will include but not limiting the following:
- design floor planning,
- place and route,
- CTS, timing analysis
- physical design verification.
Job Requirements:
-MSEE or MSCS w/ 3+ yrs experience of digital physical design.
-Experience with RTL 2 GDSII concepts and flows.
-Requires good programming/scripting skills in Perl, TCL or Python.
-STA experience
-Experience with industry standard toolsets from Cadence or Synopsys.
-Experience of physical verification.
-Excellent communication skills, both written and verbal.
-Ability to work in a team environment | l*********u 发帖数: 19053 | 2 赞LZ!
【在 a******n 的大作中提到】 : SoC Physical Design Engineer : This individual will contribute from RTL to GDS on block level designs. : Specific tasks will include but not limiting the following: : - design floor planning, : - place and route, : - CTS, timing analysis : - physical design verification. : Job Requirements: : -MSEE or MSCS w/ 3+ yrs experience of digital physical design. : -Experience with RTL 2 GDSII concepts and flows.
| l*****6 发帖数: 446 | |
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