t******l
发帖数: 77 | 1 https://intel.taleo.net/careersection/10000/jobdetail.ftl?job=774838
if you are interested, please send resume to [email protected]
/* */ | t******l
发帖数: 77 | 2 several friends inquired the reqs. Yes, we do have multiple opens.
1. PM (program manager): senior position. Need to experience project
management, understand PLC (product life cycle), drive cross sites and
cross team operation/tasks, demonstrate the leadership and ownership.
2. PHY technical lead (validation): senior position. Need to experience high
speed IO PHY design or debug. Drive the validation requirement (DFV) into
silicon for the fast TTM, drive the validation and debug, oversee the long
term PHY validation strategy.
3. SW/FW developer: senior and junior position; Good knowledge of C/C++,
Python. prefer having validation experience and understanding the low level
HW/SW interaction (such as driver)
4. System validation engineer: senior and junior position: system level
validation in pre-si (SLE/FPGA etc) and post-si. Need to understand the
computer arch, validation, C/C++, debug SW and HW etc. prefer experiencing
RTL, board, scope/LA etc.
Please send your resume to [email protected]
/* */ and mention the position you
are interested.
Good luck!
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【在 t******l 的大作中提到】
: https://intel.taleo.net/careersection/10000/jobdetail.ftl?job=774838
: if you are interested, please send resume to [email protected]
: /* */
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