m****s
发帖数: 18160 | 1 【 以下文字转载自 EE 讨论区 】
发信人: lordofring (闲云野鹤), 信区: EE
标 题: Xilinx openning
发信站: BBS 未名空间站 (Thu Aug 22 00:39:40 2013, 美东)
借用朋友的帐号发帖。
组里最近有openning.感兴趣的请站内回信。
Job Posting Title IRC97918
Job Title Senior Design Engineer
Detailed Description
Xilinx is looking for a highly qualified IC design engineer to join
the clocking hardware design team. This individual will work on digital
design of clock management blocks (eg, PLL, DLL) and clock distribution for
next generation FPGAs. The engineer will be involved in the entire design
process including RTL design, schematic generation, layout guidance, timing
and electrical verification, and working with test engineers on silicon
verification and characterization.
Job Requirements
• BS or MS in Electrical Engineering
• 2 plus years of industry experience in mixed signal or high speed
digital design
• Skilled in full custom or structured custom design and
verification
• Experience with static timing analysis tools a plus
• Working knowledge of scripting languages such as Perl
• The ideal candidate will also be familiar with mixed signal
blocks such as PLLs and DLLs
• Good communication skills – ability to write test plans, conduct
peer reviews and work well in a multisite team | w********1
发帖数: 9 | 2 您好，
我很想申请您放出的职位。 但是我是刚毕业的大学生，请问一下是否会考虑。
谢谢！
祝好，
join
【在 m****s 的大作中提到】
: 【 以下文字转载自 EE 讨论区 】
: 发信人: lordofring (闲云野鹤), 信区: EE
: 标 题: Xilinx openning
: 发信站: BBS 未名空间站 (Thu Aug 22 00:39:40 2013, 美东)
: 借用朋友的帐号发帖。
: 组里最近有openning.感兴趣的请站内回信。
: Job Posting Title IRC97918
: Job Title Senior Design Engineer
: Detailed Description
: Xilinx is looking for a highly qualified IC design engineer to join
| n*******3
发帖数: 97 | 3 Hi, are you familiar with C++ and Matlab?
【在 w********1 的大作中提到】
: 您好，
: 我很想申请您放出的职位。 但是我是刚毕业的大学生，请问一下是否会考虑。
: 谢谢！
: 祝好，
:
: join
| w********1
发帖数: 9 | 4 Yes, I have used them for engineer projects.
Thanks,
【在 n*******3 的大作中提到】
: Hi, are you familiar with C++ and Matlab?
| q****0
发帖数: 139 | 5 你好，我对你发布的职位很感兴趣，希望进一步与你详谈！
你能告诉我一下你的邮箱吗？我把简历给你发过去！
谢谢！ |
|
