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发帖数: 2 | 1 文思海辉 Pactera Technologies(www.pactera.com/en)热招 Pre-Silicon Validation
Engineer
接受OPT, H1b transfer
客户(项目): Intel
工作地点：Hillsboro, Oregon
Title: Pre-Silicon Validation Engineer
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学历要求：BS or MS in Electrical Engineering, Computer Engineering or
Electrical and Computer Engineering
需要以下经验：
• Basic analog, mixed signal circuits
• Digital logic design and simulation using Verilog/VHDL
• 熟悉OVM/UVM or Verilog/VHDL
• high speed I/Os like DDR, PCI-express, USB or similar IO
interfaces
• UNIX* or Linux*
Preferred qualifications
• experience with Verilog-A/VHDL-A/AMS and mixed signal simulation
tools like Cadence* AMS, Mentor* ADMS and/or their equivalent
• experience in SOC/ASIC verification
• experience in post-si debug and validation
• Working knowledge of C/C++/SystemC and other high level languages |
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