a******e
发帖数: 80 | 1 We designed a mixed-signal ASIC and wants to find the hottest spot on the
chip so we could place a on-chip temp sensor next to it to monitor the peak
temp.
But how do we know which part of the ASIC is the hottest? Does CADENCE
simulate this? Is it gonna near the supply pad where the highest current
comes from the highest voltage or the digital section in which lots of
counting takes place?
Thanks. |
s***7
发帖数: 1644 | 2 I don't think it should be near the supply pad since the voltage drop on it
is negligible thus drawing very small power. What you need to do is to
estimate the power of each block and place the sensor where the most power
is drawn.
In terms cadence, I'm not aware of any tool that simulates the on chip
temperature. |
C*********Q
发帖数: 348 | 3 use totem
peak
【在 a******e 的大作中提到】
: We designed a mixed-signal ASIC and wants to find the hottest spot on the
: chip so we could place a on-chip temp sensor next to it to monitor the peak
: temp.
: But how do we know which part of the ASIC is the hottest? Does CADENCE
: simulate this? Is it gonna near the supply pad where the highest current
: comes from the highest voltage or the digital section in which lots of
: counting takes place?
: Thanks.
|
f****3
发帖数: 502 | 4 不知道cadence SIP package可不可以仿这种情况？ |
f****3
发帖数: 502 | 5 不知道cadence SIP package可不可以仿这种情况？ |
