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发帖数: 85 | 1 拿到一个ARM memory design group 的onsite. 求复习建议。。看job description上
大多关于transistor level，memory,RTL coding的知识。。准备了半天。。电面的时
候问了好多 verification的东西。。觉得答得不太好。。。反到拿到onsite了。。真
心求建议。。贴个job description..
Accountabilities
Contribute in all parts of the memory development flow, starting at
design spec
Understand memory design and development in advanced technology (45nm
and beyond)
Perform physical verification, memory characterization, FE verification,
release procedure and QA flow of the memory compilers
Experiment and evaluate new memory architectures and methodologies
Work with senior members of the team to continually define, improve and
develop memory infrastructure and methods
Ensure high quality, high performance in memory compilers
Job Requirements
Essential Skills and Qualifications
Master's degree in Electrical Engineering, Computer Engineering, or
Computer Science
Understanding and project experience with the following: circuit/layout
w/ submicron technologies (90nm or smaller), technology tradeoffs,
design for manufacturability (DFM) layout techniques, low power circuit
design, memory/processor modeling and verification, and familiarity with
Cadence Virtuoso (DFII, Opus) would be helpful
Experience working with place & route chip design tools
Experience with layout automation tools, such as Prolific, Cadabra,
Qtrek
Experience with other EDA tools such as design_compiler, Astro, Physical
Compiler, PrimeTime, SoC Encounter
Coding, modifying, or reading DRC/LVS runsets
Programming or scripting experience : Verilog, VHDL, C, C++, Java, Tcl,
Perl
Understanding of memory design flow |
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